admin-guide/pm/intel_pstate.rst

1 .. SPDX-License-Identifier: GPL-2.0
22 Documentation/admin-guide/pm/cpufreq.rst if you have not done that yet.]
24 For the processors supported by ``intel_pstate``, the P-state concept is broader
27 information about that).  For this reason, the representation of P-states used
32 ``intel_pstate`` maps its internal representation of P-states to frequencies too
38 Since the hardware P-state selection interface used by ``intel_pstate`` is
43 time the corresponding CPU is taken offline and need to be re-initialized when
47 only way to pass early-configuration-time parameters to it is via the kernel
63 the processor.
66 -----------
69 hardware-managed P-states (HWP) support.  If it works in this mode, the
74 provides its own scaling algorithms for P-state selection.  Those algorithms
77 ``sysfs``).  [Note that different P-state selection algorithms may be chosen for
83 For example, the ``powersave`` P-state selection algorithm provided by
87 There are two P-state selection algorithms provided by ``intel_pstate`` in the
89 depends on whether or not the hardware-managed P-states (HWP) feature has been
90 enabled in the processor and possibly on the processor model.
92 Which of the P-state selection algorithms is used by default depends on the
100 If the processor supports the HWP feature, it will be enabled during the
101 processor initialization and cannot be disabled after that.  It is possible
105 If the HWP feature has been enabled, ``intel_pstate`` relies on the processor to
106 select P-states by itself, but still it can give hints to the processor's
107 internal P-state selection logic.  What those hints are depends on which P-state
111 Even though the P-state selection is carried out by the processor automatically,
113 in this mode.  However, they are not used for running a P-state selection
120 In this configuration ``intel_pstate`` will write 0 to the processor's
121 Energy-Performance Preference (EPP) knob (if supported) or its
122 Energy-Performance Bias (EPB) knob (otherwise), which means that the processor's
123 internal P-state selection logic is expected to focus entirely on performance.
130 Also, in this configuration the range of P-states available to the processor's
131 internal P-state selection logic is always restricted to the upper boundary
132 (that is, the maximum P-state that the driver is allowed to use).
137 In this configuration ``intel_pstate`` will set the processor's
138 Energy-Performance Preference (EPP) knob (if supported) or its
139 Energy-Performance Bias (EPB) knob (otherwise) to whatever value it was
141 set to by the platform firmware).  This usually causes the processor's
142 internal P-state selection logic to be less performance-focused.
153 any processor with the HWP feature enabled.]
156 CPU scheduler in order to run a P-state selection algorithm, either
165 Without HWP, this P-state selection algorithm is always the same regardless of
166 the processor model and platform configuration.
168 It selects the maximum P-state it is allowed to use, subject to limits set via
172 This is the default P-state selection algorithm if the
179 Without HWP, this P-state selection algorithm is similar to the algorithm
182 registers of the CPU.  It generally selects P-states proportional to the
188 is not touched if the new P-state turns out to be the same as the current
191 This is the default P-state selection algorithm if the
196 ------------
199 hardware-managed P-states (HWP) support.  It is always used if the
201 regardless of whether or not the given processor supports HWP.  [Note that the
212 hardware in order to change the P-state of a CPU (in particular, the
217 in ``sysfs`` (and the P-state selection algorithms described above are not
222 the so-called "turbo" frequency ranges).  In other words, in the passive mode
223 the entire range of available P-states is exposed by ``intel_pstate`` to the
232 Turbo P-states Support
235 In the majority of cases, the entire range of P-states available to
236 ``intel_pstate`` can be divided into two sub-ranges that correspond to
237 different types of processor behavior, above and below a boundary that
240 The P-states above the turbo threshold are referred to as "turbo P-states" and
241 the whole sub-range of P-states they belong to is referred to as the "turbo
243 multicore processor to opportunistically increase the P-state of one or more
245 thermal envelope of the processor package to be exceeded.
247 Specifically, if software sets the P-state of a CPU core within the turbo range
248 (that is, above the turbo threshold), the processor is permitted to take over
249 performance scaling control for that core and put it into turbo P-states of its
251 different processor generations.  Namely, the Sandy Bridge generation of
252 processors will never use any P-states above the last one set by software for
254 processor generations will take it as a license to use any P-states from the
256 processors setting any P-state from the turbo range will enable the processor
257 to put the given core into all turbo P-states up to and including the maximum
260 One important property of turbo P-states is that they are not sustainable.  More
262 those states indefinitely, because the power distribution within the processor
264 be exceeded if a turbo P-state was used for too long.
266 In turn, the P-states below the turbo threshold generally are sustainable.  In
267 fact, if one of them is set by software, the processor is not expected to change
269 situation (a higher P-state may still be used if it is set for another CPU in
272 Some processors allow multiple cores to be in turbo P-states at the same time,
273 but the maximum P-state that can be set for them generally depends on the number
274 of cores running concurrently.  The maximum turbo P-state that can be set for 3
275 cores at the same time usually is lower than the analogous maximum P-state for
276 2 cores, which in turn usually is lower than the maximum turbo P-state that can
277 be set for 1 core.  The one-core maximum turbo P-state is thus the maximum
280 The maximum supported turbo P-state, the turbo threshold (the maximum supported
281 non-turbo P-state) and the minimum supported P-state are specific to the
282 processor model and can be determined by reading the processor's model-specific
289 the entire range of available P-states, including the whole turbo range, to the
291 generally causes turbo P-states to be set more often when ``intel_pstate`` is
292 used relative to ACPI-based CPU performance scaling (see `below <acpi-cpufreq_>`_
296 (even if the Configurable TDP feature is enabled in the processor), its
298 work as expected in all cases (that is, if set to disable turbo P-states, it
302 Processor Support
305 To handle a given processor ``intel_pstate`` requires a number of different
308  * The minimum supported P-state.
310  * The maximum supported `non-turbo P-state <turbo_>`_.
312  * Whether or not turbo P-states are supported at all.
314  * The maximum supported `one-core turbo P-state <turbo_>`_ (if turbo P-states
318    of P-states into frequencies and the other way around.
320 Generally, ways to obtain that information are specific to the processor model
321 or family.  Although it often is possible to obtain all of it from the processor
322 itself (using model-specific registers), there are cases in which hardware
326 the driver initialization will fail if the detected processor is not in that
336 -----------------
346 	Maximum P-state the driver is allowed to set in percent of the
348 	P-state <turbo_>`_).
355 	Minimum P-state the driver is allowed to set in percent of the
357 	P-state <turbo_>`_).
364 	Number of P-states supported by the processor (between 0 and 255
365 	inclusive) including both turbo and non-turbo P-states (see
366 	`Turbo P-states Support`_).
374 	This attribute is read-only.
378 	range of supported P-states, in percent.
383 	This attribute is read-only.
388 	If set (equal to 1), the driver is not allowed to set any turbo P-states
389 	(see `Turbo P-states Support`_).  If unset (equal to 0, which is the
390 	default), turbo P-states can be set by the driver.
397 	but it affects the maximum possible value of per-policy P-state	limits
403 	the processor.  If set (equal to 1), it causes the minimum P-state limit
408 	This setting has no effect on logical CPUs whose minimum P-state limit
409 	is directly set to the highest non-turbo P-state or above it.
432 	that string - or to be unregistered in the "off" case.  [Actually,
436 	as well as the per-policy ones) are then reset to their default
441 	Lake or Coffee Lake desktop CPU model. By default, energy-efficiency
443 	Enabling energy-efficiency optimizations may limit maximum operating
447 	attribute to "1" enables the energy-efficiency optimizations and setting
451 -----------------------------------
454 Documentation/admin-guide/pm/cpufreq.rst is special with ``intel_pstate``
459 ``scaling_cur_freq`` attributes are produced by applying a processor-specific
460 multiplier to the internal P-state representation used by ``intel_pstate``.
462 attributes are capped by the frequency corresponding to the maximum P-state that
466 not allowed to use turbo P-states, so the maximum value of ``scaling_max_freq``
467 and ``scaling_min_freq`` is limited to the maximum non-turbo P-state frequency.
475 and ``scaling_min_freq`` corresponds to the maximum supported turbo P-state,
482 	List of P-state selection algorithms provided by ``intel_pstate``.
485 	P-state selection algorithm provided by ``intel_pstate`` currently in
489 	Frequency of the average P-state of the CPU represented by the given
494 processor:
508 Coordination of P-State Limits
509 ------------------------------
511 ``intel_pstate`` allows P-state limits to be set in two ways: with the help of
521  2. Each individual CPU is affected by its own per-policy limits (that is, it
522     cannot be requested to run faster than its own per-policy maximum and it
523     cannot be requested to run slower than its own per-policy minimum). The
524     effective performance depends on whether the platform supports per core
525     P-states, hyper-threading is enabled and on current performance requests
526     from other CPUs. When platform doesn't support per core P-states, the
528     other CPUs are requesting higher performance at that moment. Even with per
529     core P-states support, when hyper-threading is enabled, if the sibling CPU
533  3. The global and per-policy limits can be set independently.
537 limits change in order to request its internal P-state selection logic to always
538 set P-states within these limits.  Otherwise, the limits are taken into account
540 every time before setting a new P-state for a CPU.
548 ---------------------------
550 If the hardware-managed P-states (HWP) is enabled in the processor, additional
552 processor's internal P-state selection logic by focusing it on performance or on
553 energy-efficiency, or somewhere between the two extremes, are present in every
567 	self-explanatory, except that ``default`` represents whatever hint
571 internally translated to integer values written to the processor's
572 Energy-Performance Preference (EPP) knob (if supported) or its
573 Energy-Performance Bias (EPB) knob. It is also possible to write a positive
580 load-balancing algorithm and if different energy vs performance hints are
585 .. _acpi-cpufreq:
587 ``intel_pstate`` vs ``acpi-cpufreq``
597 ``acpi-cpufreq`` scaling driver.  On systems supported by ``intel_pstate``
598 the ``acpi-cpufreq`` driver uses the same hardware CPU performance scaling
599 interface, but the set of P-states it can use is limited by the ``_PSS``
602 On those systems each ``_PSS`` object returns a list of P-states supported by
603 the corresponding CPU which basically is a subset of the P-states range that can
607 than the frequency of the highest non-turbo P-state listed by it, but the
608 corresponding P-state representation (following the hardware specification)
609 returned for it matches the maximum supported turbo P-state (or is the
612 The list of P-states returned by ``_PSS`` is reflected by the table of
613 available frequencies supplied by ``acpi-cpufreq`` to the ``CPUFreq`` core and
617 frequency reported by ``acpi-cpufreq`` is higher by 1 MHz than the frequency
618 of the highest supported non-turbo P-state listed by ``_PSS`` which, of course,
624 (possibly multiplied by a constant), then it will tend to choose P-states below
625 the turbo threshold if ``acpi-cpufreq`` is used as the scaling driver, because
629 benefit from running at turbo frequencies will be given non-turbo P-states
634 turbo threshold.  Namely, if that is not coordinated with the lists of P-states
636 a turbo P-state in those lists and there may be a problem with avoiding the
638 P-states overall, ``acpi-cpufreq`` simply avoids using the topmost state listed
639 by ``_PSS``, but that is not sufficient when there are other turbo P-states in
642 Apart from the above, ``acpi-cpufreq`` works like ``intel_pstate`` in the
643 `passive mode <Passive Mode_>`_, except that the number of P-states it can set
650 Several kernel command line options can be used to pass early-configuration-time
656 	processor is supported by it.
668 	``acpi-cpufreq`` even if the latter is preferred on the given system.
671 	power capping) that rely on the availability of ACPI P-states
676 	``intel_pstate`` and on platforms where the ``pcc-cpufreq`` scaling
677 	driver is used instead of ``acpi-cpufreq``.
680 	Do not enable the hardware-managed P-states (HWP) feature even if it is
681 	supported by the processor.
685 	hardware-managed P-states (HWP) feature is supported by the processor.
696 	Use per-logical-CPU P-State limits (see `Coordination of P-state
704 ------------
719 …gnome-terminal--4510  [001] ..s.  1177.680733: pstate_sample: core_busy=107 scaled=94 from=26 to=2…
720  cat-5235  [002] ..s.  1177.681723: cpu_frequency: state=2900000 cpu_id=2
728 ----------
730 The ``ftrace`` interface can be used for low-level diagnostics of
732 P-state is called, the ``ftrace`` filter can be set to
736  # cat available_filter_functions | grep -i pstate
742  # cat trace | head -15
745  # entries-in-buffer/entries-written: 80/80   #P:4
747  #                              _-----=> irqs-off
748  #                             / _----=> need-resched
749  #                            | / _---=> hardirq/softirq
750  #                            || / _--=> preempt-depth
752  #           TASK-PID   CPU#  ||||    TIMESTAMP  FUNCTION
754              Xorg-3129  [000] ..s.  2537.644844: intel_pstate_set_pstate <-intel_pstate_timer_func
755   gnome-terminal--4510  [002] ..s.  2537.649844: intel_pstate_set_pstate <-intel_pstate_timer_func
756       gnome-shell-3409  [001] ..s.  2537.650850: intel_pstate_set_pstate <-intel_pstate_timer_func
757            <idle>-0     [000] ..s.  2537.654843: intel_pstate_set_pstate <-intel_pstate_timer_func
766 .. [2] *Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 3: System Programming …
767 …com/content/www/us/en/architecture-and-technology/64-ia-32-architectures-software-developer-system…