Lines Matching +full:two +full:- +full:lane
9 Port in a Vendor-Specific Extended Capability named RAS D.E.S (Debug, Error
15 provides the following two features:
17 - one 64-bit counter for Time Based Analysis (RX/TX data throughput and
18 time spent in each low-power LTSSM state) and
19 - one 32-bit counter for Event Counting (error and non-error events for
20 a specified lane)
25 -------------------
28 throughput and time spent in each low-power LTSSM state by the controller.
29 The PMU measures data in two categories:
31 - Group#0: Percentage of time the controller stays in LTSSM states.
32 - Group#1: Amount of data processed (Units of 16 bytes).
34 Lane Event counters
35 -------------------
37 Using this feature you can obtain Error and Non-Error information in
38 specific lane by the controller. The PMU event is selected by all of:
40 - Group i
41 - Event j within the Group i
42 - Lane k
71 dwc_rootport_13018/rx_memory_read,lane=?/ [Kernel PMU event]
74 -------------------------------
78 $# perf stat -a -e dwc_rootport_13018/Rx_PCIe_TLP_Data_Payload/
85 Lane Event Usage
86 -------------------------------
88 Each lane has the same event set and to avoid generating a list of hundreds
89 of events, the user need to specify the lane ID explicitly, e.g.::
91 $# perf stat -a -e dwc_rootport_13018/rx_memory_read,lane=4/
94 work. Per-task (without "-a") perf sessions are not supported.