admin-guide/mm/numaperf.rst

21  +------------------+     +------------------+
22  | Compute Node 0   +-----+ Compute Node 1   |
24  +--------+---------+     +--------+---------+
26  +--------+---------+     +--------+---------+
28  +------------------+     +--------+---------+
36 performance when accessing a given memory target. Each initiator-target
48 	# symlinks -v /sys/devices/system/node/nodeX/access0/targets/
49 	relative: /sys/devices/system/node/nodeX/access0/targets/nodeY -> ../../nodeY
51 	# symlinks -v /sys/devices/system/node/nodeY/access0/initiators/
52 	relative: /sys/devices/system/node/nodeY/access0/initiators/nodeX -> ../../nodeX
82 	# tree -P "read*|write*" /sys/devices/system/node/nodeY/access0/initiators/
84 	|-- read_bandwidth
85 	|-- read_latency
86 	|-- write_bandwidth
87 	`-- write_latency
106 by the last memory level in the hierarchy. The system meanwhile uses
110 The term "far memory" is used to denote the last level memory in the
111 hierarchy. Each increasing cache level provides higher performing
115 This numbering is different than CPU caches where the cache level (ex:
116 L1, L2, L3) uses the CPU-side view where each increased level is lower
117 performing. In contrast, the memory cache level is centric to the last
118 level memory, so the higher numbered cache level corresponds to  memory
121 The memory-side caches are not directly addressable by software. When
124 accesses the next level of memory until there is either a hit in that
125 cache level, or it reaches far memory.
140 a memory-side cache, or that information is not accessible to the kernel.
142 The attributes for each level of cache is provided under its cache
143 level index::
149 Each cache level's directory provides its attributes. For example, the
150 following shows a single cache level and the attributes available for
155 	|-- index1
156 	|   |-- indexing
157 	|   |-- line_size
158 	|   |-- size
159 	|   `-- write_policy
161 The "indexing" will be 0 if it is a direct-mapped cache, and non-zero
162 for any other indexed based, multi-way associativity.
165 level on a miss.
167 The "size" is the number of bytes provided by this cache level.
169 The "write_policy" will be 0 for write-back, and non-zero for
170 write-through caching.
176 - Section 5.2.27