accel/qaic/qaic.rst

1 .. SPDX-License-Identifier: GPL-2.0-only
10 Interrupts  chapter
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21 non-empty and generate MSIs at a rate equivalent to the speed of the
37 generates 100k IRQs per second (per /proc/interrupts) is reduced to roughly 64
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51 when only one MSI has been configured and directs the interrupts for the DBCs
57 If the DBC is configured to force MSI interrupts, this can circumvent the
72 QAIC handles and enforces the required little endianness and 64-bit alignment,
76 The terminate transaction is of particular use to QAIC. QAIC is not aware of
128   call is non-blocking. Success only indicates that the BOs have been queued
143   processed and can be re-queued to the device, or a timeout occurs.
158   and detach slice calls allows userspace to use a BO with multiple workloads.
169 may only use memory they allocate, and DBCs that are assigned to their
180 Configures QAIC to use a polling thread for datapath events instead of relying
181 on the device interrupts. Useful for platforms with broken multiMSI. Must be