Lines Matching +full:com +full:- +full:mode
1 What: /sys/bus/coresight/devices/<tpdm-name>/integration_test
4 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
11 Accepts only one of the 2 values - 1 or 2.
15 What: /sys/bus/coresight/devices/<tpdm-name>/reset_dataset
18 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
22 Accepts only one value - 1.
25 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_type
28 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
32 Accepts only one of the 2 values - 0 or 1.
36 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_ts
39 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
43 Accepts only one of the 2 values - 0 or 1.
47 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_mode
50 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
52 (RW) Set/Get the programming mode of the DSB for tpdm.
56 Bit[0:1] : Test mode control bit for choosing the inputs.
57 Bit[3] : Set to 0 for low performance mode. Set to 1 for high
58 performance mode.
59 Bit[4:8] : Select byte lane for high performance mode.
61 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_idx
64 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
70 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_val
73 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
81 0 - Rising edge detection
82 1 - Falling edge detection
83 2 - Rising and falling edge detection (toggle detection)
86 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_mask
89 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
96 Accepts only one of the 2 values - 0 or 1.
98 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/edcr[0:15]
101 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
105 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/edcmr[0:7]
108 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
112 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_patt/xpr[0:7]
115 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
120 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_patt/xpmr[0:7]
123 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
128 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpr[0:7]
131 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
135 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpmr[0:7]
138 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
142 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/enable_ts
145 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
150 Accepts only one of the 2 values - 0 or 1.
154 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/set_type
157 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
162 Accepts only one of the 2 values - 0 or 1.
166 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_msr/msr[0:31]
169 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
174 What: /sys/bus/coresight/devices/<tpdm-name>/cmb_mode
177 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
178 Description: (Write) Set the data collection mode of CMB tpdm. Continuous
180 Trace-on-change creates CMB data set elements only when a new
184 Accepts only one of the 2 values - 0 or 1.
185 0 : Continuous CMB collection mode.
186 1 : Trace-on-change CMB collection mode.
188 What: /sys/bus/coresight/devices/<tpdm-name>/cmb_trig_patt/xpr[0:1]
191 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
196 What: /sys/bus/coresight/devices/<tpdm-name>/cmb_trig_patt/xpmr[0:1]
199 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
204 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpr[0:1]
207 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
211 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpmr[0:1]
214 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
218 What: /sys/bus/coresight/devices/<tpdm-name>/cmb_patt/enable_ts
221 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
226 Accepts only one of the 2 values - 0 or 1.
230 What: /sys/bus/coresight/devices/<tpdm-name>/cmb_trig_ts
233 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
237 Accepts only one of the 2 values - 0 or 1.
241 What: /sys/bus/coresight/devices/<tpdm-name>/cmb_ts_all
244 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
249 Accepts only one of the 2 values - 0 or 1.
253 What: /sys/bus/coresight/devices/<tpdm-name>/cmb_msr/msr[0:31]
256 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>