Lines Matching +full:read +full:- +full:to +full:- +full:read
16 Description: (RW) Disables write access to the Trace RAM by stopping the
18 following the trigger event. The number of 32-bit words written
19 into the Trace RAM following the trigger event is equal to the
20 value stored in this register+1 (from ARM ETB-TRM).
26 Description: (Read) Defines the depth, in words, of the trace RAM in powers of
27 2. The value is read directly from HW register RDP, 0x004.
33 Description: (Read) Shows the value held by the ETB status register. The value
34 is read directly from HW register STS, 0x00C.
40 Description: (Read) Shows the value held by the ETB RAM Read Pointer register
41 that is used to read entries from the Trace RAM over the APB
42 interface. The value is read directly from HW register RRP,
49 Description: (Read) Shows the value held by the ETB RAM Write Pointer register
50 that is used to sets the write pointer to write entries from
51 the CoreSight bus into the Trace RAM. The value is read directly
58 Description: (Read) Similar to "trigger_cntr" above except that this value is
59 read directly from HW register TRG, 0x01C.
65 Description: (Read) Shows the value held by the ETB Control register. The value
66 is read directly from HW register CTL, 0x020.
72 Description: (Read) Shows the value held by the ETB Formatter and Flush Status
73 register. The value is read directly from HW register FFSR,
80 Description: (Read) Shows the value held by the ETB Formatter and Flush Control
81 register. The value is read directly from HW register FFCR,