c88f3c2d | 05-Oct-2023 |
Chaithanya Garrepalli <quic_cgarrepa@quicinc.com> |
qcacmn: Fix overflow issue with hlos_tid_override set
In dp_tx_fast_send_be() fix issue while updating hlos_tid_override bit in TX descriptor
Change-Id: I470d5140585ad3abefcb1345b52dc0caa3cf6fe4 CR
qcacmn: Fix overflow issue with hlos_tid_override set
In dp_tx_fast_send_be() fix issue while updating hlos_tid_override bit in TX descriptor
Change-Id: I470d5140585ad3abefcb1345b52dc0caa3cf6fe4 CRs-Fixed: 3631006
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552f04ac | 28-Sep-2023 |
Namita Nair <quic_namibala@quicinc.com> |
qcacmn: Check return value of nbuf_map in tx_ipa_smmu_map
Currently the return status of qdf_nbuf_map_single() is not checked in dp_tx_ipa_uc_attach(). This change adds the check to ensure that each
qcacmn: Check return value of nbuf_map in tx_ipa_smmu_map
Currently the return status of qdf_nbuf_map_single() is not checked in dp_tx_ipa_uc_attach(). This change adds the check to ensure that each nbuf in the TX buff pool, is successfully mapped before providing the nbuf to be IPA SMMU mapped.
Change-Id: Ic40479af8f2eaa2ced87b20a25250844e5e146bf CRs-Fixed: 3629564
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15654da3 | 10-Oct-2023 |
Nandha Kishore Easwaran <quic_nandhaki@quicinc.com> |
qcacmn: Revert - Move lithium specific code into 1.0 files
This reverts commit I3504052e7d717bb6e26af1b3980c2bb926df9a9b
Reason for revert: 2.0 tx ops registration failure
Change-Id: I1c27fb337e33
qcacmn: Revert - Move lithium specific code into 1.0 files
This reverts commit I3504052e7d717bb6e26af1b3980c2bb926df9a9b
Reason for revert: 2.0 tx ops registration failure
Change-Id: I1c27fb337e33b6533185a52a809f2b13b09edf45 CRs-Fixed: 3636070
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70b5c653 | 03-Oct-2023 |
Ruben Columbus <quic_rcolumbu@quicinc.com> |
qcacmn: set customizable rx_buffer_size
introduce custom rx_buffer_size from INI within the bounds of 2048-4096
Change-Id: I17ad727cea74fc559d6407d3c8662cb6a4cd6b0a CRs-Fixed: 3631271 |
a4a989e5 | 29-Sep-2023 |
Varsha Mishra <quic_varsham@quicinc.com> |
qcacmn: Fix nbuf leak in tx datapath
Free nbuf_clone before returning from dp_tx_mlo_mcast_multipass_send. Since this API is allocating nbuf_clone, it has the responsibility of freeing it.
Change-I
qcacmn: Fix nbuf leak in tx datapath
Free nbuf_clone before returning from dp_tx_mlo_mcast_multipass_send. Since this API is allocating nbuf_clone, it has the responsibility of freeing it.
Change-Id: I7a1334a1d941ec352533e788a65596a1b12ae08a CRs-Fixed: 3628989
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47296136 | 29-Sep-2023 |
Chaithanya Garrepalli <quic_cgarrepa@quicinc.com> |
qcacmn: replenish complete rx_refill ring in UMAC reset
In case of UMAC reset if in_use buffers are sufficient to fill complete RX refill ring we are replenishing only 1/3rd ring at pre-reset.
In c
qcacmn: replenish complete rx_refill ring in UMAC reset
In case of UMAC reset if in_use buffers are sufficient to fill complete RX refill ring we are replenishing only 1/3rd ring at pre-reset.
In case of low threshold interrupts disabled ring might be never refilled. At post reset refill complete ring.
Change-Id: I0e4ed942120619ef357bc91f8cbbab8c1fd1b06e CRs-Fixed: 3628996
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c7792077 | 12-Sep-2023 |
Nandha Kishore Easwaran <quic_nandhaki@quicinc.com> |
qcacmn: Move lithium specific code into 1.0 files
Move lithium specific monitor code into monitor 1.0 files. Donot include 1.0 specific files when CONFIG_LITHIUM is not defined.
Change-Id: I3504052
qcacmn: Move lithium specific code into 1.0 files
Move lithium specific monitor code into monitor 1.0 files. Donot include 1.0 specific files when CONFIG_LITHIUM is not defined.
Change-Id: I3504052e7d717bb6e26af1b3980c2bb926df9a9b CRs-Fixed: 3615746
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55527a7c | 03-Oct-2023 |
Venkateswara Naralasetty <quic_vnaralas@quicinc.com> |
qcacmn: Changes required to enable monitor mode for Rhine architecture
Changes required to enable monitor for Rhine architecture.
Change-Id: Ib2558c9e61a3e55a68c0f612aed7a153feeb3f17 CRs-Fixed: 363
qcacmn: Changes required to enable monitor mode for Rhine architecture
Changes required to enable monitor for Rhine architecture.
Change-Id: Ib2558c9e61a3e55a68c0f612aed7a153feeb3f17 CRs-Fixed: 3631592
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ab8c55ec | 22-Sep-2023 |
Ruben Columbus <quic_rcolumbu@quicinc.com> |
qcacmn: correct casting and array write index
- correct uint32_t* casting to uint16_t* given that it can overwrite values after is dereferenced - correct check for "for loop" max iteration as it cou
qcacmn: correct casting and array write index
- correct uint32_t* casting to uint16_t* given that it can overwrite values after is dereferenced - correct check for "for loop" max iteration as it could pass and overwrite max array size.
Change-Id: Id2b02d1eea8c4ce4d962160bea99358fe3ab5cf7 CRs-Fixed: 3622399
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ce99e4ef | 05-Oct-2023 |
Amir Patel <quic_amirpate@quicinc.com> |
qcacmn: Add debug to catch non-consecutive duplicate descriptor
Add debug to catch non-consecutive duplicate descriptor in monitor
Change-Id: I253cecf472d5d75154f5791f85761da2f6d9076e CRs-Fixed: 36
qcacmn: Add debug to catch non-consecutive duplicate descriptor
Add debug to catch non-consecutive duplicate descriptor in monitor
Change-Id: I253cecf472d5d75154f5791f85761da2f6d9076e CRs-Fixed: 3628868
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a7be27e5 | 02-Oct-2023 |
Amir Patel <quic_amirpate@quicinc.com> |
qcacmn: Fine tune monitor dup desc WAR
In existing host WAR, we set pre_desc to NULL. Due to this duplicacy across PPDUs is not caught. remove setting prev_desc to NULL.
Change-Id: Ib2c903eb768fa39
qcacmn: Fine tune monitor dup desc WAR
In existing host WAR, we set pre_desc to NULL. Due to this duplicacy across PPDUs is not caught. remove setting prev_desc to NULL.
Change-Id: Ib2c903eb768fa399c37e9b1d17b661b9ae1c1d2a CRs-Fixed: 3629867
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70b27b1e | 03-Oct-2023 |
Amit Mehta <quic_amitmeht@quicinc.com> |
qcacmn: Add changes to account for encryption header size
This reverts Change-Id: I521b0990fe9e5746a8c8cfb29de7064cf51d0687 (qcacmn: Add fix for encryption fragment ping)
Original change has remove
qcacmn: Add changes to account for encryption header size
This reverts Change-Id: I521b0990fe9e5746a8c8cfb29de7064cf51d0687 (qcacmn: Add fix for encryption fragment ping)
Original change has removed logic to Account for encryption header size during 802.11 header decapsulation. Which is resulting in DHCP failure in fragmented DHCP frames, as N/W stack is dropping DHCP offer due to invalid payload.
Revert back to account for encryption header size during 802.11 header decapsulation
Change-Id: I246e19bf7637d3b66b5d0b3648c76d8765502ac6 CRs-Fixed: 3627678
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f0e5c491 | 29-Sep-2023 |
Neha Bisht <quic_nbisht@quicinc.com> |
qcacmn: Use FAST_FLAG for simplified nbuf map operation
Use FAST flag instead of SIMPLE flag for simplified nbuf map operation
Change-Id: Ie4f0e6b691876eb04351efe9da94578b98c4258c CRs-Fixed: 3629314 |
3600a51a | 29-Sep-2023 |
Karthik Kantamneni <quic_vkantamn@quicinc.com> |
qcacmn: Fix RXDMA null buffer address access issue
During mon_pdev_init RX monitor status buffers will be attached to status ring. In case of buffer allocation failure HP will be pointing to null bu
qcacmn: Fix RXDMA null buffer address access issue
During mon_pdev_init RX monitor status buffers will be attached to status ring. In case of buffer allocation failure HP will be pointing to null buffer address entry and during ring process this index slot will be skipped. This will lead to RXDMA accessing null buffer address descriptor.
Fix this by adjusting the HP of monitor status ring during RX buffer allocation failures.
Change-Id: I290a724fefc6f65be058a84c97b9e6d51a08ef39 CRs-Fixed: 3268663
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8616350e | 29-Sep-2023 |
Harsh Kumar Bijlani <quic_hbijlani@quicinc.com> |
qcacmn: Change order of SAWF enabled conditional check
Legacy SCS uses skb mark field to specify the priority i.e TID. This feature is to be supported independent of SAWF framework. Therefore change
qcacmn: Change order of SAWF enabled conditional check
Legacy SCS uses skb mark field to specify the priority i.e TID. This feature is to be supported independent of SAWF framework. Therefore change the order of SAWF enabled conditional check.
Change-Id: I445f697395c8140b3b9fd7f877dfa8d057f0eaa8 CRs-Fixed: 3630722
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c3697eb2 | 27-Sep-2023 |
Vaishnavi Chekuru <quic_vchekuru@quicinc.com> |
qcacmn: Changing the integer suffix from 1L to 1ULL
In expression 1L << err_code if the err_code is more than 32, it is left shifting by more than 32 bits which will result in undefined behavior and
qcacmn: Changing the integer suffix from 1L to 1ULL
In expression 1L << err_code if the err_code is more than 32, it is left shifting by more than 32 bits which will result in undefined behavior and will be overflowed. So changing the suffix from 1L to 1ULL as max value of err_code can go up to 63.
Change-Id: I6218a1634e982e4f25e5d92d55325ed9bb2658e9 CRs-Fixed: 3627050
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6505649e | 04-Oct-2023 |
Alan Z. Chen <quic_alache@quicinc.com> |
qcacmn: Change dp_get_peer_state() log to debug
Excessive logging when dp_get_peer_state() is called is causing power performance issues. Change log level from info to debug in order to reduce exces
qcacmn: Change dp_get_peer_state() log to debug
Excessive logging when dp_get_peer_state() is called is causing power performance issues. Change log level from info to debug in order to reduce excessive logging.
Change-Id: I752b0bd443ad6bc4431c8f25a0c483729bebaa37 CRs-Fixed: 3631190
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41e5a457 | 25-Sep-2023 |
Sushant Butta <quic_sbutta@quicinc.com> |
qcacmn: cdp support enable/disable dp debug logging
Added cdp support to get/set dp debug logging in per packet path. Enable debug logs only if dp debug logging is enabled. With this change there is
qcacmn: cdp support enable/disable dp debug logging
Added cdp support to get/set dp debug logging in per packet path. Enable debug logs only if dp debug logging is enabled. With this change there is benefit of all CPU average around 1% to 1.5%
Change-Id: Ibe0ca4c75211cace4c5fca9ec0bce1c594ca8a6b CRs-Fixed: 3623910
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d6ee46a4 | 03-Aug-2023 |
Aman Mehta <quic_amanmeht@quicinc.com> |
qcacmn: Add support for average tx/rx rate
Apstats use to return last tx/rx rate for avg. tx/rx rates. This change updates the behavior to return average tx/rx rates.
Change-Id: Idfff2ae9df7c5af1ef
qcacmn: Add support for average tx/rx rate
Apstats use to return last tx/rx rate for avg. tx/rx rates. This change updates the behavior to return average tx/rx rates.
Change-Id: Idfff2ae9df7c5af1ef86ceb5688b1e01fd6dae21 CRs-Fixed: 3628056
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e0d7d004 | 28-Sep-2023 |
Jinwei Chen <quic_jinweic@quicinc.com> |
qcacmn: Set skb's ip_summed to CHECKSUM_NONE if checksum failure
Only if both IP and TCP/UDP checksum passed for TCP/UDP packets, then set ip_summed to CHECKSUM_UNNECESSARY, otherwise set it to CHEC
qcacmn: Set skb's ip_summed to CHECKSUM_NONE if checksum failure
Only if both IP and TCP/UDP checksum passed for TCP/UDP packets, then set ip_summed to CHECKSUM_UNNECESSARY, otherwise set it to CHECKSUM_NONE.
Change-Id: Ic4973e32d622f66830dbd7a5bc03012cf6dd87bf CRs-Fixed: 3626292
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dc9d363e | 20-Sep-2023 |
Jeevan Kukkalli <quic_jeevank@quicinc.com> |
qcacmn: Add check for invalid frame ctrl version
Add check for invalid frame control version while handling raw frames with FCS errors in monitor version 2 path
Change-Id: Ia46de15a235ec5ab2f0b67ff
qcacmn: Add check for invalid frame ctrl version
Add check for invalid frame control version while handling raw frames with FCS errors in monitor version 2 path
Change-Id: Ia46de15a235ec5ab2f0b67ff9769cb0b5c38aeee CRs-Fixed: 3620872
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f9b6804d | 26-Sep-2023 |
Ajithkumar Jayamoorthy <quic_ajayamoo@quicinc.com> |
qcacmn: Resolve coverity issues for operational rate config implementation
Resolve the 'modulo by 0' coverity issue for the implementation for manual configuration of mcs via "tr069_set_oprate" comm
qcacmn: Resolve coverity issues for operational rate config implementation
Resolve the 'modulo by 0' coverity issue for the implementation for manual configuration of mcs via "tr069_set_oprate" command.
Change-Id: Iccb29ed0aede59929267dd22e580609c7c853577 CRs-Fixed: 3625355
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f03c6210 | 19-Sep-2023 |
Amir Patel <quic_amirpate@quicinc.com> |
qcacmn: Update per-MPDU fcs err in radiotap hdr
Update per-MPDU fcs err in radiotap hdr
Change-Id: I3570ec94435746538cccc07ec052e26a19ab6452 CRs-Fixed: 3619376 |
1f0e7d3b | 15-Sep-2023 |
aloksing <quic_aloksing@quicinc.com> |
qcacmn: preventing potential Side effect of ++ operation
preventing potential Side effect of ++ operation in assertion
Change-Id: Ibdad7e856143fbcde45d4c8db637b608ef3983cd CRs-Fixed: 3617044 |
3efaabd7 | 03-Jul-2023 |
Himanshu Batra <quic_hbatra@quicinc.com> |
qcacmn: Update UIO info for DP data rings
Update UIO info for DP data rings.
Change-Id: I0c6e8c8e59aefb373dc024d91eb1379ed7564f31 CRs-Fixed: 3623839 |