1def1b74 | 16-Dec-2022 |
Sai Kumar Kunchala <quic_kunchala@quicinc.com> |
cnss2: Add NULL check for 'dev' pointer
Add NULL check for 'dev' pointer before passing to cnss_bus_dev_to_plat_priv function.
Change-Id: I319a9859c41d7e8096b3a4457f4a831e0e93f7ab CRs-Fixed: 3360223 |
f61b9298 | 14-Dec-2022 |
Naman Padhiar <quic_npadhiar@quicinc.com> |
cnss2: Validate maximum number of memory segments
For WIN use case maximum number of memory segments requested by FW is increased to 52 in QMI layer. Since CNSS2 driver uses same QMI header files an
cnss2: Validate maximum number of memory segments
For WIN use case maximum number of memory segments requested by FW is increased to 52 in QMI layer. Since CNSS2 driver uses same QMI header files and message structures the same maximum number of segment is applicable for CNSS2. It means for memory allocation, FW can request 52 memory segments to CNSS2 via QMI indication but local CNSS2 variable which get segment info from indication supports maximum 32 segments. To fix it, change CNSS2 array variable size to same as number of maximum segment supported in QMI layer.
Change-Id: I661b55b53cb31327da12f064d0a516884159eb5b CRs-Fixed: 3355665
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4def39b4 | 13-Dec-2022 |
Alan Chen <quic_alache@quicinc.com> |
cnss2: Add data length validation in cnss_wlfw_qdss_data_send_sync()
Add a data length validation check in fw response message in qdss_data_send_sync().
Change-Id: I197b8d52c06e35f5fcf0f8fee94429fd
cnss2: Add data length validation in cnss_wlfw_qdss_data_send_sync()
Add a data length validation check in fw response message in qdss_data_send_sync().
Change-Id: I197b8d52c06e35f5fcf0f8fee94429fdcf500fcb CRs-Fixed: 3359589
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6660ad60 | 30-Nov-2022 |
Naman Padhiar <quic_npadhiar@quicinc.com> |
cnss2: Add support for Audio IOMMU map and unmap
Add support for IOMMU map and unmap of WLAN memory regions into Audio SMMU for direct link usecases.
Change-Id: Ic136b1e5ac22641b6612ab5285452273233
cnss2: Add support for Audio IOMMU map and unmap
Add support for IOMMU map and unmap of WLAN memory regions into Audio SMMU for direct link usecases.
Change-Id: Ic136b1e5ac22641b6612ab5285452273233fcaea
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7e8d3149 | 06-Dec-2022 |
Alan Chen <quic_alache@quicinc.com> |
cnss2: Include smcinvoke.h from include/linux path
smcinvoke.h header file is moved to include/linux for pineapple target. Hence, include smcinvoke.h from include/linux path.
Change-Id: Iec5622b09f
cnss2: Include smcinvoke.h from include/linux path
smcinvoke.h header file is moved to include/linux for pineapple target. Hence, include smcinvoke.h from include/linux path.
Change-Id: Iec5622b09f8dd6536f5b9c8f81c46320731ba630 CRs-Fixed: 3354727
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a7f6cb03 | 26-Oct-2022 |
chunquan <quic_chunquan@quicinc.com> |
cnss2: Free m3 blob memory once driver probed
Free m3 blob memory after driver probed.
Change-Id: I10803eae60f2308b3a024877cdb7c446f3d33802 CRs-Fixed: 3321438 |
42fee6ec | 23-Nov-2022 |
Naman Padhiar <quic_npadhiar@quicinc.com> |
cnss2: Add API to send WFC mode to WLAN FW
Add and export API to host driver to send WFC(WiFi Calling) mode to WLAN FW.
Change-Id: I92d3d0baad9afc6fdf66f66b847a4e8a90a54341 CRs-Fixed: 3346550 |
35fdadc9 | 16-Nov-2022 |
Naman Padhiar <quic_npadhiar@quicinc.com> |
cnss2: Avoid shadow register dump in RDDM mode
Before CNSS2 triggers RDDM mode in device it collects shadow register dump in a global variable. Now when device moves to RDDM, shadow registers will b
cnss2: Avoid shadow register dump in RDDM mode
Before CNSS2 triggers RDDM mode in device it collects shadow register dump in a global variable. Now when device moves to RDDM, shadow registers will be reset. Reading shadow registers in RDDM mode will override previously read correct values with reset values. To avoid it, do not dump shadow register in RDDM mode.
Change-Id: I470208be7e38bc9291932a7acfbaf07d87d46651
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69cf56c2 | 09-Nov-2022 |
Naman Padhiar <quic_npadhiar@quicinc.com> |
cnss2: Dump PBL logging registers on RDDM timeout
Dump PBL and SBL logging registers to debug RDDM failure.
Change-Id: I9225e95c529a928e6e6f9e4528dadbe7237440b3 |
8d75ecdd | 24-Nov-2022 |
Rajesh Chauhan <quic_rajeshc@quicinc.com> |
cnss2: Setup GPIOs for interrupt wakeup capable
Setup GPIOs for interrupt wakeup capable by calling msm_gpio_mpm_wake_set() for such GPIOs.
Change-Id: I8a6e35b6e5ab49c569bfcb0a96c5361072cbe458 CRs-
cnss2: Setup GPIOs for interrupt wakeup capable
Setup GPIOs for interrupt wakeup capable by calling msm_gpio_mpm_wake_set() for such GPIOs.
Change-Id: I8a6e35b6e5ab49c569bfcb0a96c5361072cbe458 CRs-Fixed: 3345066
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3ea3cda1 | 16-Nov-2022 |
Rajesh Chauhan <quic_rajeshc@quicinc.com> |
cnss2: Add support for additional regulators
Add support for regulators: 1.2V IO, and Antenna sharing to enable those based on entries in device tree file.
Change-Id: I362f0251ff3923c725f0e2a62922a
cnss2: Add support for additional regulators
Add support for regulators: 1.2V IO, and Antenna sharing to enable those based on entries in device tree file.
Change-Id: I362f0251ff3923c725f0e2a62922a35149bef3b9 CRs-Fixed: 3338737
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e6f30383 | 17-Nov-2022 |
Tiger Yu <quic_tfyu@quicinc.com> |
cnss2: Do not notify mhi about pcie link down for QCA6174
Do not invoke the mhi_control_error to notify the pcie link down event for QCA6174 to avoid NULL pointer access.
Change-Id: I2c899ab51117ae
cnss2: Do not notify mhi about pcie link down for QCA6174
Do not invoke the mhi_control_error to notify the pcie link down event for QCA6174 to avoid NULL pointer access.
Change-Id: I2c899ab51117aef2f9474e83217229b211eb4759 CRs-Fixed: 3335555
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2fd60f79 | 08-Nov-2022 |
Naman Padhiar <quic_npadhiar@quicinc.com> |
cnss2: Add API to get FW supported capabilities
Add and export API to check whether FW capabilities like DIRECT_LINK, etc are supported by FW or not. Update WLAN Firmware Service QMI file as per lat
cnss2: Add API to get FW supported capabilities
Add and export API to check whether FW capabilities like DIRECT_LINK, etc are supported by FW or not. Update WLAN Firmware Service QMI file as per latest IDL file.
Change-Id: Ic33104ec55e18845b8c33ff611d1ecc15ec5cd77 CRs-Fixed: 3335259
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39a9deb4 | 24-Nov-2020 |
Lin Bai <lbai@codeaurora.org> |
cnss2: Only send host IOVA range to firmware when SMMU enabled
Only when SMMU S1 enabled, CNSS driver will send IOVA range in HOST_CAP message, and let firmware to configure ATU.
Change-Id: Idd1906
cnss2: Only send host IOVA range to firmware when SMMU enabled
Only when SMMU S1 enabled, CNSS driver will send IOVA range in HOST_CAP message, and let firmware to configure ATU.
Change-Id: Idd19063da975c0105d91e0e31575d0b0d1edd8e2 CRs-Fixed: 2896035
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6dcd57f6 | 25-Oct-2022 |
Will Huang <quic_wilhuang@quicinc.com> |
cnss2: Add support for handling AFC memory request from FW
Add APIs for handling AFC memory request from FW: cnss_send_buffer_to_afcmem() and cnss_reset_afcmem().
cnss_send_buffer_to_afcmem() will
cnss2: Add support for handling AFC memory request from FW
Add APIs for handling AFC memory request from FW: cnss_send_buffer_to_afcmem() and cnss_reset_afcmem().
cnss_send_buffer_to_afcmem() will be called if receive valid AFC response data, cnss_reset_afcmem() will be called if receive invalid AFC response data. After memory copy done, another WMI command will indicate FW ready to read.
Change-Id: I34b9add3d7721d778e5474d9b11ad64adb4f04f0 CRs-Fixed: 3223607
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bf7a1982 | 23-Aug-2022 |
Lin Bai <quic_lbai@quicinc.com> |
cnss2: Print the bandwidth level voted to IPC log
This refine commit 418727f314fa ("cnss2: Print the bandwidth level voted"), to avoid too many vote log in dmesg during traffic test.
Change-Id: Ia2
cnss2: Print the bandwidth level voted to IPC log
This refine commit 418727f314fa ("cnss2: Print the bandwidth level voted"), to avoid too many vote log in dmesg during traffic test.
Change-Id: Ia260a84bcdb3e5154376471519340db1b5907ce4 CRs-Fixed: 3273973
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04ddb614 | 26-Sep-2022 |
Sandeep Singh <quic_sandsing@quicinc.com> |
cnss2: Use ol cpr to update retention voltage of aop regulator
Use ol cpr to update retention voltage of aop regulator for qca6490 chipsets.
Change-Id: Ic67ca32964bd89fb940be069ec9468d97bbec68d CRs
cnss2: Use ol cpr to update retention voltage of aop regulator
Use ol cpr to update retention voltage of aop regulator for qca6490 chipsets.
Change-Id: Ic67ca32964bd89fb940be069ec9468d97bbec68d CRs-Fixed: 3326028
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86668543 | 30-Sep-2022 |
Sandeep Singh <quic_sandsing@quicinc.com> |
cnss2: Add RC_EP_ULTRASHORT_CHANNEL in cnss feature list
Add RC_EP_ULTRASHORT_CHANNEL in cnss feature if it is enabled in dtsi and indicate it to wlan fw.
Change-Id: Ic70c4b1b2dd637f11c2e2b281521f2
cnss2: Add RC_EP_ULTRASHORT_CHANNEL in cnss feature list
Add RC_EP_ULTRASHORT_CHANNEL in cnss feature if it is enabled in dtsi and indicate it to wlan fw.
Change-Id: Ic70c4b1b2dd637f11c2e2b281521f2094a9a2fe9 CRs-Fixed: 3323608
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fb716dd2 | 21-Oct-2022 |
Naman Padhiar <quic_npadhiar@quicinc.com> |
cnss2: Unregister host driver during PCI remove
CNSS2 registers as both platform and PCI driver. PCI device can be removed via sysfs exposed by kernel during PCI device creation. When PCI device get
cnss2: Unregister host driver during PCI remove
CNSS2 registers as both platform and PCI driver. PCI device can be removed via sysfs exposed by kernel during PCI device creation. When PCI device gets removed, CNSS PCI remove ops gets called. In cnss_pci_remove, unregister host driver and shutdown WLAN chip to cleanly remove PCI device.
Change-Id: Ia60e8b69bda2b3bdd5990cb83f47c082d6667283 CRs-Fixed: 3308910
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bb44300a | 17-Oct-2022 |
Bing Sun <quic_bings@quicinc.com> |
cnss2: get msi_data again after request_irq is called
The reservation mode of interrupts in kernel assigns a dummy vector when the interrupt is allocated and assigns a real vector when the request_i
cnss2: get msi_data again after request_irq is called
The reservation mode of interrupts in kernel assigns a dummy vector when the interrupt is allocated and assigns a real vector when the request_irq is called. The reservation mode helps to ease vector pressure when devices with a large amount of queues/interrupts are initialized, but only a minimal subset of those queues/interrupts is actually used. So on reservation mode, the msi_data may change after request_irq is called, so reads msi_data again after mhi request_irq is called, and then the correct msi_data is programmed into hardware components. Without this change, spurious interrupt occurs in case of one MSI vector.
Change-Id: I41070987798835f8fa95304fce3b964bbd77b31d CRs-Fixed: 3313984
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7418239f | 23-Sep-2022 |
Bing Sun <quic_bings@quicinc.com> |
cnss2: Add force one MSI field for quirk
Add new bit FORCE_ONE_MSI for quirk to force one MSI configure
Change-Id: I5053a0f95619ee75aad8a4c3f413affc0f9af3f5 CRs-Fixed: 3313980 |
fe37b559 | 23-Sep-2022 |
Bing Sun <quic_bings@quicinc.com> |
cnss2: Add one MSI vector support
Some platforms can't meet the number of MSI interrupt vectors that wlan driver requires. Add one MSI interrupt vector support. If CONFIG_ONE_MSI_VECTOR is not defin
cnss2: Add one MSI vector support
Some platforms can't meet the number of MSI interrupt vectors that wlan driver requires. Add one MSI interrupt vector support. If CONFIG_ONE_MSI_VECTOR is not defined, wlan driver fails to load if reuired MSI vector allocation fails. It is current behavior. If CONFIG_ONE_MSI_VECTOR is defined, firstly it will allocate multiple MSI vectors based on MSI config. If MSI vector allocation fails, it fallbacks to one MSI vector automatically.
Change-Id: I813f7ddf678ecf405e573f3bc72af3e758d1c96d CRs-Fixed: 3312670
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99580edb | 04-Sep-2022 |
Wade Song <quic_wadesong@quicinc.com> |
cnss2: Remove function cnss_pm_notify
To protect firmware download not be processed when system goes into suspend, before we add semaphore cnss_pm_sem in cnss driver. Function cnss_pm_notify, PM_POS
cnss2: Remove function cnss_pm_notify
To protect firmware download not be processed when system goes into suspend, before we add semaphore cnss_pm_sem in cnss driver. Function cnss_pm_notify, PM_POST_SUSPEND may be got before PM_SUSPEND_PREPARE. Once it happens, the count of cnss_pm_sem will be abnormal.
And, ROME firmware download is in qcacld driver. Not in cnss driver.
So, remove function cnss_pm_notify, and the export symbol cnss_lock_pm_sem and cnss_release_pm_sem. Move the protection to qcacld driver. In qcacld driver, use wakeup source to protect ROME firmware download.
Change-Id: I7768fdbeb1fa8cd6ef3b260eb0aafb231aeed324 CRs-Fixed: 3294347
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6d69e079 | 17-Oct-2022 |
Wade Song <quic_wadesong@quicinc.com> |
cnss2: Fix a typo in a parameter type
There is a typo in the parameter list of function cnss_aop_set_vreg_param's declaration, and that is causing a compilation error when CONFIG_MSM_QMP is not defi
cnss2: Fix a typo in a parameter type
There is a typo in the parameter list of function cnss_aop_set_vreg_param's declaration, and that is causing a compilation error when CONFIG_MSM_QMP is not defined on certain platforms.
Fix the compilation error by changing the 3rd parameter's type from 'cnss_aop_tcs_seq_pram' to 'cnss_aop_tcs_seq_param'.
Change-Id: Iccb832e1d841a82db3df42c93ef8ed8367a93d26 CRs-Fixed: 3314506
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e079e895 | 11-Oct-2022 |
Jayachandran Sreekumaran <quic_jsreekum@quicinc.com> |
cnss2: Check calibration support after pci probe
Ensure the completion of pci probe before checking whether the calibration is supported for the device id or not.
Change-Id: Ifb6b6b15c434c16822bb8a
cnss2: Check calibration support after pci probe
Ensure the completion of pci probe before checking whether the calibration is supported for the device id or not.
Change-Id: Ifb6b6b15c434c16822bb8a4291403e4a635f985f CRs-Fixed: 3303831
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